| 1. | A kind of gain error correction scheme for sample - and - hold circuit
保持电路中的一种增益误差自校正方法 |
| 2. | Colour hold circuit
彩色信号同步电路 |
| 3. | Sample and hold circuit
取样保持电路 |
| 4. | Track and hold circuit
跟踪保持电路 |
| 5. | Sampling hold circuit
取样保持电路 |
| 6. | In front of the a / d converter in an analog conversion system is usually located a sample - and - hold circuit
在模拟量转换系统中在模/数转换器的前端通常都会有一个采样-保持电路。 |
| 7. | The column output circuit is realized by double sample and hold circuit which can effectively decrease fpn ( fixed pattern noise )
列输出电路采用双采样电路,该电路能有效地消除固定模式噪声。 |
| 8. | The system , based on 89c51 , has two stages of sampling and holding circuits , which can discriminates positive - going edge and negative - going edge of signals , providing signal peak information
如果以横坐标为信号道址、纵坐标为道址对应的计数率,可以得到一条核辐射谱线。 |
| 9. | The sample and hold circuit is employed by the bottom plate sampling technique , which could not only cancel the charge injection error but also eliminate the effect of clock feed - through
采样保持电路设计采用了电容下极板采样技术，不仅有效地避免了电荷注入效应引起的采样信号失真，而且消除了时钟馈通效应的不良影响。 |
